/**
 * \file IfxVadc_cfg.c
 * \brief VADC on-chip implementation data
 *
 * \version iLLD_1_0_1_11_0
 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
 *
 *
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/******************************************************************************/
/*----------------------------------Includes----------------------------------*/
/******************************************************************************/

#include "IfxVadc_cfg.h"

/******************************************************************************/
/*-----------------------Exported Variables/Constants-------------------------*/
/******************************************************************************/

IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS * 4) + (IFXVADC_NUM_ADC_COMMON_GROUPS * 4)] = {
    (uint32)&SRC_VADC_G0_SR0,
    (uint32)&SRC_VADC_G0_SR1,
    (uint32)&SRC_VADC_G0_SR2,
    (uint32)&SRC_VADC_G0_SR3,
    (uint32)&SRC_VADC_G1_SR0,
    (uint32)&SRC_VADC_G1_SR1,
    (uint32)&SRC_VADC_G1_SR2,
    (uint32)&SRC_VADC_G1_SR3,
    (uint32)&SRC_VADC_G2_SR0,
    (uint32)&SRC_VADC_G2_SR1,
    (uint32)&SRC_VADC_G2_SR2,
    (uint32)&SRC_VADC_G2_SR3,
    (uint32)&SRC_VADC_G3_SR0,
    (uint32)&SRC_VADC_G3_SR1,
    (uint32)&SRC_VADC_G3_SR2,
    (uint32)&SRC_VADC_G3_SR3,
    (uint32)&SRC_VADC_CG0_SR0,
    (uint32)&SRC_VADC_CG0_SR1,
    (uint32)&SRC_VADC_CG0_SR2,
    (uint32)&SRC_VADC_CG0_SR3,
    (uint32)&SRC_VADC_CG1_SR0,
    (uint32)&SRC_VADC_CG1_SR1,
    (uint32)&SRC_VADC_CG1_SR2,
    (uint32)&SRC_VADC_CG1_SR3
};
